ANALOG-TO-DIGITAL CONVERTERS PLAY AN IMPORTANT ROLE IN OUR DAILY LIVES. Sigma Delta (SD) CONVERTER IS AN ATTRACTIVE ADC FOR FUTURE COMMUNICATION SYSTEMS DUE TO ITS HIGH RESOLUTION RATE. THIS PAPER PRESENTS THE Sigma Delta ADC WHICH IS SUITABLE FOR EMBEDDED FPGA APPLICATIONS. DESIGNING ORDER 2 Sigma Delta ADC WAS CARRIED OUT IN MATLAB SIMULINK AND WAS IMPLEMENTED ON SPARTAN6 FPGA KIT. IN THIS PAPER, WE HAVE PRESENTED THE DESIGN OF Sigma Delta ADC. A 2ND Sigma Delta MODULATOR IS THE TARGETS SIGNAL BAND OF 20 K HZ FOR HAM VOICE APPLICATIONS WITH AN OVERSAMPLING RATIO OF 512 AND A SAMPLING FREQUENCY OF 20.48 M HZ. A HIGH SIGNAL-TO-NOISE RATIO OF 110 DB IS ACHIEVED WHICH PROVIDES A 17.5BIT RESOLUTION, AND ITS EXECUTION ON SPARTAN 6 FPGA KIT. IT CONSUMES 184 SLICE REGISTERS, 150 FLIP FLOPS, 319 SLICES OF LUTS, 314 LOGICS, AND 20 BONDED IOBSS. THE RESULTS SHOW THAT THE PROPOSED DESIGN IS QUITE ACCURATE.